Programmable read-only memory (PROM) chips are well known and widely used in a variety of computer devices. Typically, a PROM chip includes a grid of metal conductors forming rows and columns. Each row/column intersection includes a conductive fuse that provides one bit of memory. To program a fuse, a relatively high current is selectively routed to the fuse to cause the fuse to burn out. Intersections where fuses remain are one logic value and intersections where fuses are burned out are the other logic value.
In inkjet printheads, fuse technology has been included in N-channel metal-oxide semiconductor (NMOS) chips. In these NMOS chips, fuses are programmed in substantially the same way, where fuses are selectively burned out to program a bit. However, programming chips in this way has some drawbacks. If a chip is improperly programmed, there is no way to fix it and the chip must be discarded. Also, fuses are relatively large and can be unreliable. In addition, fuses can damage the orifice layer of the inkjet during programming and after a fuse burns out metal debris from the fuse can be drawn into the ink and cause blockage in the inkjet pen, resulting in poor quality printing.
In recent years, electronically programmable read-only memory (EPROM) devices have been developed. These EPROM devices include a conductive grid of rows and columns, but they do not include fuses. Instead, a memory cell is located at each row/column intersection. Each memory cell includes a transistor structure and two gates that are separated from each other by a thin dielectric layer. One of the gates is a floating gate and the other is a control gate or input gate. In an unprogrammed memory cell, the floating gate has no charge, which causes the threshold voltage to be low. In a programmed memory cell, the floating gate is charged with electrons and the threshold voltage is higher. To program a memory cell, a programming voltage (e.g., 10 to 16 volts) is applied to the control gate and drain. This programming voltage draws excited electrons to the floating gate, thereby increasing the threshold voltage. A memory cell having a lower threshold voltage is one logic value and a memory cell having a higher threshold voltage is the other logic value.